APM:Libraries
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Header of the Core Layer. More...
Go to the source code of this file.
Classes | |
struct | USB_OTG_hc |
struct | USB_OTG_ep |
struct | USB_OTG_core_cfg |
struct | usb_setup_req |
struct | _Device_TypeDef |
struct | _Device_cb |
struct | _USBD_USR_PROP |
struct | _DCD |
struct | _HCD |
struct | _OTG |
struct | USB_OTG_handle |
Macros | |
#define | USB_OTG_EP0_IDLE 0 |
#define | USB_OTG_EP0_SETUP 1 |
#define | USB_OTG_EP0_DATA_IN 2 |
#define | USB_OTG_EP0_DATA_OUT 3 |
#define | USB_OTG_EP0_STATUS_IN 4 |
#define | USB_OTG_EP0_STATUS_OUT 5 |
#define | USB_OTG_EP0_STALL 6 |
#define | USB_OTG_EP_TX_DIS 0x0000 |
#define | USB_OTG_EP_TX_STALL 0x0010 |
#define | USB_OTG_EP_TX_NAK 0x0020 |
#define | USB_OTG_EP_TX_VALID 0x0030 |
#define | USB_OTG_EP_RX_DIS 0x0000 |
#define | USB_OTG_EP_RX_STALL 0x1000 |
#define | USB_OTG_EP_RX_NAK 0x2000 |
#define | USB_OTG_EP_RX_VALID 0x3000 |
#define | MAX_DATA_LENGTH 0x200 |
Typedefs | |
typedef struct USB_OTG_hc | USB_OTG_HC |
typedef struct USB_OTG_hc * | PUSB_OTG_HC |
typedef struct USB_OTG_ep | USB_OTG_EP |
typedef struct USB_OTG_ep * | PUSB_OTG_EP |
typedef struct USB_OTG_core_cfg | USB_OTG_CORE_CFGS |
typedef struct USB_OTG_core_cfg * | PUSB_OTG_CORE_CFGS |
typedef struct usb_setup_req | USB_SETUP_REQ |
typedef struct _Device_TypeDef | USBD_DEVICE |
typedef struct _Device_TypeDef * | pUSBD_DEVICE |
typedef struct _Device_cb | USBD_Class_cb_TypeDef |
typedef struct _USBD_USR_PROP | USBD_Usr_cb_TypeDef |
typedef struct _DCD | DCD_DEV |
typedef struct _DCD * | DCD_PDEV |
typedef struct _HCD | HCD_DEV |
typedef struct _HCD * | USB_OTG_USBH_PDEV |
typedef struct _OTG | OTG_DEV |
typedef struct _OTG * | USB_OTG_USBO_PDEV |
typedef struct USB_OTG_handle | USB_OTG_CORE_HANDLE |
typedef struct USB_OTG_handle * | PUSB_OTG_CORE_HANDLE |
Enumerations | |
enum | USB_OTG_STS { USB_OTG_OK = 0, USB_OTG_FAIL } |
enum | HC_STATUS { HC_IDLE = 0, HC_XFRC, HC_HALTED, HC_NAK, HC_NYET, HC_STALL, HC_XACTERR, HC_BBLERR, HC_DATATGLERR } |
enum | URB_STATE { URB_IDLE = 0, URB_DONE, URB_NOTREADY, URB_ERROR, URB_STALL } |
enum | CTRL_STATUS { CTRL_START = 0, CTRL_XFRC, CTRL_HALTED, CTRL_NAK, CTRL_STALL, CTRL_XACTERR, CTRL_BBLERR, CTRL_DATATGLERR, CTRL_FAIL } |
Functions | |
USB_OTG_STS | USB_OTG_CoreInit (USB_OTG_CORE_HANDLE *pdev) |
USB_OTG_CoreInit Initializes the USB_OTG controller registers and prepares the core device mode or host mode operation. More... | |
USB_OTG_STS | USB_OTG_SelectCore (USB_OTG_CORE_HANDLE *pdev, const USB_OTG_CORE_ID_TypeDef coreID) |
USB_OTG_SelectCore Initialize core registers address. More... | |
USB_OTG_STS | USB_OTG_EnableGlobalInt (USB_OTG_CORE_HANDLE *pdev) |
USB_OTG_EnableGlobalInt Enables the controller's Global Int in the AHB Config reg. More... | |
USB_OTG_STS | USB_OTG_DisableGlobalInt (USB_OTG_CORE_HANDLE *pdev) |
USB_OTG_DisableGlobalInt Enables the controller's Global Int in the AHB Config reg. More... | |
void * | USB_OTG_ReadPacket (USB_OTG_CORE_HANDLE *pdev, uint8_t *dest, uint16_t len) |
USB_OTG_ReadPacket : Reads a packet from the Rx FIFO. More... | |
USB_OTG_STS | USB_OTG_WritePacket (USB_OTG_CORE_HANDLE *pdev, const uint8_t *src, uint8_t ch_ep_num, uint16_t len) |
USB_OTG_WritePacket : Writes a packet into the Tx FIFO associated with the EP. More... | |
USB_OTG_STS | USB_OTG_FlushTxFifo (USB_OTG_CORE_HANDLE *pdev, uint32_t num) |
USB_OTG_FlushTxFifo : Flush a Tx FIFO. More... | |
USB_OTG_STS | USB_OTG_FlushRxFifo (USB_OTG_CORE_HANDLE *pdev) |
USB_OTG_FlushRxFifo : Flush a Rx FIFO. More... | |
uint32_t | USB_OTG_ReadCoreItr (USB_OTG_CORE_HANDLE *pdev) |
USB_OTG_ReadCoreItr : returns the Core Interrupt register. More... | |
uint32_t | USB_OTG_ReadOtgItr (USB_OTG_CORE_HANDLE *pdev) |
USB_OTG_ReadOtgItr : returns the USB_OTG Interrupt register. More... | |
uint8_t | USB_OTG_IsHostMode (USB_OTG_CORE_HANDLE *pdev) |
USB_OTG_IsHostMode : Check if it is host mode. More... | |
uint8_t | USB_OTG_IsDeviceMode (USB_OTG_CORE_HANDLE *pdev) |
USB_OTG_IsDeviceMode : Check if it is device mode. More... | |
uint32_t | USB_OTG_GetMode (USB_OTG_CORE_HANDLE *pdev) |
USB_OTG_GetMode : Get current mode. More... | |
USB_OTG_STS | USB_OTG_PhyInit (USB_OTG_CORE_HANDLE *pdev) |
USB_OTG_STS | USB_OTG_SetCurrentMode (USB_OTG_CORE_HANDLE *pdev, uint8_t mode) |
USB_OTG_SetCurrentMode : Set ID line. More... | |
USB_OTG_STS | USB_OTG_CoreInitDev (USB_OTG_CORE_HANDLE *pdev) |
USB_OTG_CoreInitDev : Initializes the USB_OTG controller registers for device mode. More... | |
USB_OTG_STS | USB_OTG_EnableDevInt (USB_OTG_CORE_HANDLE *pdev) |
USB_OTG_EnableDevInt : Enables the Device mode interrupts. More... | |
uint32_t | USB_OTG_ReadDevAllInEPItr (USB_OTG_CORE_HANDLE *pdev) |
USB_OTG_ReadDevAllInEPItr : Get int status register. More... | |
enum USB_OTG_SPEED | USB_OTG_GetDeviceSpeed (USB_OTG_CORE_HANDLE *pdev) |
USB_OTG_GetDeviceSpeed Get the device speed from the device status register. More... | |
USB_OTG_STS | USB_OTG_EP0Activate (USB_OTG_CORE_HANDLE *pdev) |
enables EP0 OUT to receive SETUP packets and configures EP0 for transmitting packets More... | |
USB_OTG_STS | USB_OTG_EPActivate (USB_OTG_CORE_HANDLE *pdev, USB_OTG_EP *ep) |
USB_OTG_EPActivate : Activates an EP. More... | |
USB_OTG_STS | USB_OTG_EPDeactivate (USB_OTG_CORE_HANDLE *pdev, USB_OTG_EP *ep) |
USB_OTG_EPDeactivate : Deactivates an EP. More... | |
USB_OTG_STS | USB_OTG_EPStartXfer (USB_OTG_CORE_HANDLE *pdev, USB_OTG_EP *ep) |
USB_OTG_EPStartXfer : Handle the setup for data xfer for an EP and starts the xfer. More... | |
USB_OTG_STS | USB_OTG_EP0StartXfer (USB_OTG_CORE_HANDLE *pdev, USB_OTG_EP *ep) |
USB_OTG_EP0StartXfer : Handle the setup for a data xfer for EP0 and starts the xfer. More... | |
USB_OTG_STS | USB_OTG_EPSetStall (USB_OTG_CORE_HANDLE *pdev, USB_OTG_EP *ep) |
USB_OTG_EPSetStall : Set the EP STALL. More... | |
USB_OTG_STS | USB_OTG_EPClearStall (USB_OTG_CORE_HANDLE *pdev, USB_OTG_EP *ep) |
Clear the EP STALL. More... | |
uint32_t | USB_OTG_ReadDevAllOutEp_itr (USB_OTG_CORE_HANDLE *pdev) |
USB_OTG_ReadDevAllOutEp_itr : returns OUT endpoint interrupt bits. More... | |
uint32_t | USB_OTG_ReadDevOutEP_itr (USB_OTG_CORE_HANDLE *pdev, uint8_t epnum) |
USB_OTG_ReadDevOutEP_itr : returns Device OUT EP Interrupt register. More... | |
void | USB_OTG_InitDevSpeed (USB_OTG_CORE_HANDLE *pdev, uint8_t speed) |
USB_OTG_InitDevSpeed :Initializes the DevSpd field of DCFG register depending the PHY type and the enumeration speed of the device. More... | |
uint8_t | USBH_IsEvenFrame (USB_OTG_CORE_HANDLE *pdev) |
void | USB_OTG_EP0_OutStart (USB_OTG_CORE_HANDLE *pdev) |
configures EPO to receive SETUP packets More... | |
void | USB_OTG_ActiveRemoteWakeup (USB_OTG_CORE_HANDLE *pdev) |
USB_OTG_RemoteWakeup : active remote wakeup signalling. More... | |
void | USB_OTG_UngateClock (USB_OTG_CORE_HANDLE *pdev) |
USB_OTG_UngateClock : active USB Core clock. More... | |
void | USB_OTG_StopDevice (USB_OTG_CORE_HANDLE *pdev) |
Stop the device and clean up fifo's. More... | |
void | USB_OTG_SetEPStatus (USB_OTG_CORE_HANDLE *pdev, USB_OTG_EP *ep, uint32_t Status) |
Set the EP Status. More... | |
uint32_t | USB_OTG_GetEPStatus (USB_OTG_CORE_HANDLE *pdev, USB_OTG_EP *ep) |
returns the EP Status More... | |
Header of the Core Layer.
Licensed under MCD-ST Liberty SW License Agreement V2, (the "License"); You may not use this file except in compliance with the License. You may obtain a copy of the License at:
http://www.st.com/software_license_agreement_liberty_v2
Unless required by applicable law or agreed to in writing, software distributed under the License is distributed on an "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the License for the specific language governing permissions and limitations under the License.
Definition in file usb_core.h.