APM:Libraries
usb_dcd.c
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1 
28 /* Includes ------------------------------------------------------------------*/
29 #include "usb_dcd.h"
30 #include "usb_bsp.h"
31 
32 
93 {
94  uint32_t i;
95  USB_OTG_EP *ep;
96 
97  USB_OTG_SelectCore (pdev , coreID);
98 
100  pdev->dev.device_address = 0;
101 
102  /* Init ep structure */
103  for (i = 0; i < pdev->cfg.dev_endpoints ; i++)
104  {
105  ep = &pdev->dev.in_ep[i];
106  /* Init ep structure */
107  ep->is_in = 1;
108  ep->num = i;
109  ep->tx_fifo_num = i;
110  /* Control until ep is actvated */
111  ep->type = EP_TYPE_CTRL;
113  ep->xfer_buff = 0;
114  ep->xfer_len = 0;
115  }
116 
117  for (i = 0; i < pdev->cfg.dev_endpoints; i++)
118  {
119  ep = &pdev->dev.out_ep[i];
120  /* Init ep structure */
121  ep->is_in = 0;
122  ep->num = i;
123  ep->tx_fifo_num = i;
124  /* Control until ep is activated */
125  ep->type = EP_TYPE_CTRL;
127  ep->xfer_buff = 0;
128  ep->xfer_len = 0;
129  }
130 
132 
133  /*Init the Core (common init.) */
134  USB_OTG_CoreInit(pdev);
135 
136 
137  /* Force Device Mode*/
139 
140  /* Init Device */
141  USB_OTG_CoreInitDev(pdev);
142 
143 
144  /* Enable USB Global interrupt */
146 }
147 
148 
156  uint8_t ep_addr,
157  uint16_t ep_mps,
158  uint8_t ep_type)
159 {
160  USB_OTG_EP *ep;
161 
162  if ((ep_addr & 0x80) == 0x80)
163  {
164  ep = &pdev->dev.in_ep[ep_addr & 0x7F];
165  }
166  else
167  {
168  ep = &pdev->dev.out_ep[ep_addr & 0x7F];
169  }
170  ep->num = ep_addr & 0x7F;
171 
172  ep->is_in = (0x80 & ep_addr) != 0;
173  ep->maxpacket = ep_mps;
174  ep->type = ep_type;
175  if (ep->is_in)
176  {
177  /* Assign a Tx FIFO */
178  ep->tx_fifo_num = ep->num;
179  }
180  /* Set initial data PID. */
181  if (ep_type == USB_OTG_EP_BULK )
182  {
183  ep->data_pid_start = 0;
184  }
185  USB_OTG_EPActivate(pdev , ep );
186  return 0;
187 }
194 uint32_t DCD_EP_Close(USB_OTG_CORE_HANDLE *pdev , uint8_t ep_addr)
195 {
196  USB_OTG_EP *ep;
197 
198  if ((ep_addr&0x80) == 0x80)
199  {
200  ep = &pdev->dev.in_ep[ep_addr & 0x7F];
201  }
202  else
203  {
204  ep = &pdev->dev.out_ep[ep_addr & 0x7F];
205  }
206  ep->num = ep_addr & 0x7F;
207  ep->is_in = (0x80 & ep_addr) != 0;
208  USB_OTG_EPDeactivate(pdev , ep );
209  return 0;
210 }
211 
212 
222  uint8_t ep_addr,
223  uint8_t *pbuf,
224  uint16_t buf_len)
225 {
226  USB_OTG_EP *ep;
227 
228  ep = &pdev->dev.out_ep[ep_addr & 0x7F];
229 
230  /*setup and start the Xfer */
231  ep->xfer_buff = pbuf;
232  ep->xfer_len = buf_len;
233  ep->xfer_count = 0;
234  ep->is_in = 0;
235  ep->num = ep_addr & 0x7F;
236 
237  if (pdev->cfg.dma_enable == 1)
238  {
239  ep->dma_addr = (uint32_t)pbuf;
240  }
241 
242  if ( ep->num == 0 )
243  {
244  USB_OTG_EP0StartXfer(pdev , ep);
245  }
246  else
247  {
248  USB_OTG_EPStartXfer(pdev, ep );
249  }
250  return 0;
251 }
252 
262  uint8_t ep_addr,
263  uint8_t *pbuf,
264  uint32_t buf_len)
265 {
266  USB_OTG_EP *ep;
267 
268  ep = &pdev->dev.in_ep[ep_addr & 0x7F];
269 
270  /* Setup and start the Transfer */
271  ep->is_in = 1;
272  ep->num = ep_addr & 0x7F;
273  ep->xfer_buff = pbuf;
274  ep->dma_addr = (uint32_t)pbuf;
275  ep->xfer_count = 0;
276  ep->xfer_len = buf_len;
277 
278  if ( ep->num == 0 )
279  {
280  USB_OTG_EP0StartXfer(pdev , ep);
281  }
282  else
283  {
284  USB_OTG_EPStartXfer(pdev, ep );
285  }
286  return 0;
287 }
288 
289 
296 uint32_t DCD_EP_Stall (USB_OTG_CORE_HANDLE *pdev, uint8_t epnum)
297 {
298  USB_OTG_EP *ep;
299  if ((0x80 & epnum) == 0x80)
300  {
301  ep = &pdev->dev.in_ep[epnum & 0x7F];
302  }
303  else
304  {
305  ep = &pdev->dev.out_ep[epnum];
306  }
307 
308  ep->is_stall = 1;
309  ep->num = epnum & 0x7F;
310  ep->is_in = ((epnum & 0x80) == 0x80);
311 
312  USB_OTG_EPSetStall(pdev , ep);
313  return (0);
314 }
315 
316 
323 uint32_t DCD_EP_ClrStall (USB_OTG_CORE_HANDLE *pdev, uint8_t epnum)
324 {
325  USB_OTG_EP *ep;
326  if ((0x80 & epnum) == 0x80)
327  {
328  ep = &pdev->dev.in_ep[epnum & 0x7F];
329  }
330  else
331  {
332  ep = &pdev->dev.out_ep[epnum];
333  }
334 
335  ep->is_stall = 0;
336  ep->num = epnum & 0x7F;
337  ep->is_in = ((epnum & 0x80) == 0x80);
338 
339  USB_OTG_EPClearStall(pdev , ep);
340  return (0);
341 }
342 
343 
350 uint32_t DCD_EP_Flush (USB_OTG_CORE_HANDLE *pdev , uint8_t epnum)
351 {
352 
353  if ((epnum & 0x80) == 0x80)
354  {
355  USB_OTG_FlushTxFifo(pdev, epnum & 0x7F);
356  }
357  else
358  {
359  USB_OTG_FlushRxFifo(pdev);
360  }
361 
362  return (0);
363 }
364 
365 
372 void DCD_EP_SetAddress (USB_OTG_CORE_HANDLE *pdev, uint8_t address)
373 {
375  dcfg.d32 = 0;
376  dcfg.b.devaddr = address;
377  USB_OTG_MODIFY_REG32( &pdev->regs.DREGS->DCFG, 0, dcfg.d32);
378 }
379 
386 {
387 #ifndef USE_OTG_MODE
389  dctl.d32 = USB_OTG_READ_REG32(&pdev->regs.DREGS->DCTL);
390  /* Connect device */
391  dctl.b.sftdiscon = 0;
392  USB_OTG_WRITE_REG32(&pdev->regs.DREGS->DCTL, dctl.d32);
394 #endif
395 }
396 
397 
404 {
405 #ifndef USE_OTG_MODE
407  dctl.d32 = USB_OTG_READ_REG32(&pdev->regs.DREGS->DCTL);
408  /* Disconnect device for 3ms */
409  dctl.b.sftdiscon = 1;
410  USB_OTG_WRITE_REG32(&pdev->regs.DREGS->DCTL, dctl.d32);
412 #endif
413 }
414 
415 
423 uint32_t DCD_GetEPStatus(USB_OTG_CORE_HANDLE *pdev ,uint8_t epnum)
424 {
425  USB_OTG_EP *ep;
426  uint32_t Status = 0;
427 
428  if ((0x80 & epnum) == 0x80)
429  {
430  ep = &pdev->dev.in_ep[epnum & 0x7F];
431  }
432  else
433  {
434  ep = &pdev->dev.out_ep[epnum];
435  }
436 
437  Status = USB_OTG_GetEPStatus(pdev ,ep);
438 
439  /* Return the current status */
440  return Status;
441 }
442 
450 void DCD_SetEPStatus (USB_OTG_CORE_HANDLE *pdev , uint8_t epnum , uint32_t Status)
451 {
452  USB_OTG_EP *ep;
453 
454  if ((0x80 & epnum) == 0x80)
455  {
456  ep = &pdev->dev.in_ep[epnum & 0x7F];
457  }
458  else
459  {
460  ep = &pdev->dev.out_ep[epnum];
461  }
462 
463  USB_OTG_SetEPStatus(pdev ,ep , Status);
464 }
465 
478 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
USB_OTG_STS USB_OTG_FlushTxFifo(USB_OTG_CORE_HANDLE *pdev, uint32_t num)
USB_OTG_FlushTxFifo : Flush a Tx FIFO.
Definition: usb_core.c:461
uint32_t DCD_GetEPStatus(USB_OTG_CORE_HANDLE *pdev, uint8_t epnum)
returns the EP Status
Definition: usb_dcd.c:423
USB_OTG_STS USB_OTG_EPSetStall(USB_OTG_CORE_HANDLE *pdev, USB_OTG_EP *ep)
USB_OTG_EPSetStall : Set the EP STALL.
Definition: usb_core.c:1806
uint32_t DCD_EP_Flush(USB_OTG_CORE_HANDLE *pdev, uint8_t epnum)
This Function flushes the FIFOs.
Definition: usb_dcd.c:350
#define USB_OTG_DEFAULT
Definition: usb_dcd.h:56
Specific api&#39;s relative to the used hardware platform.
USB_OTG_STS USB_OTG_EnableGlobalInt(USB_OTG_CORE_HANDLE *pdev)
USB_OTG_EnableGlobalInt Enables the controller&#39;s Global Int in the AHB Config reg.
Definition: usb_core.c:426
USB_OTG_STS USB_OTG_SelectCore(USB_OTG_CORE_HANDLE *pdev, USB_OTG_CORE_ID_TypeDef coreID)
USB_OTG_SelectCore Initialize core registers address.
Definition: usb_core.c:222
__IO uint32_t DCFG
Definition: usb_regs.h:115
uint8_t num
Definition: usb_core.h:138
void DCD_DevConnect(USB_OTG_CORE_HANDLE *pdev)
Connect device (enable internal pull-up)
Definition: usb_dcd.c:385
USB_OTG_STS USB_OTG_EPActivate(USB_OTG_CORE_HANDLE *pdev, USB_OTG_EP *ep)
USB_OTG_EPActivate : Activates an EP.
Definition: usb_core.c:1480
uint32_t dma_addr
Definition: usb_core.h:148
void DCD_Init(USB_OTG_CORE_HANDLE *pdev, USB_OTG_CORE_ID_TypeDef coreID)
Definition: usb_dcd.c:91
uint32_t DCD_EP_Tx(USB_OTG_CORE_HANDLE *pdev, uint8_t ep_addr, uint8_t *pbuf, uint32_t buf_len)
Transmit data over USB.
Definition: usb_dcd.c:261
#define EP_TYPE_CTRL
Definition: usb_defines.h:140
USB_OTG_STS USB_OTG_DisableGlobalInt(USB_OTG_CORE_HANDLE *pdev)
USB_OTG_DisableGlobalInt Enables the controller&#39;s Global Int in the AHB Config reg.
Definition: usb_core.c:444
void DCD_DevDisconnect(USB_OTG_CORE_HANDLE *pdev)
Disconnect device (disable internal pull-up)
Definition: usb_dcd.c:403
USB_OTG_CORE_ID_TypeDef
Definition: usb_defines.h:186
uint8_t dev_endpoints
Definition: usb_core.h:165
#define USB_OTG_MAX_EP0_SIZE
Definition: usb_regs.h:71
USB_OTG_CORE_CFGS cfg
Definition: usb_core.h:298
uint32_t DCD_EP_Open(USB_OTG_CORE_HANDLE *pdev, uint8_t ep_addr, uint16_t ep_mps, uint8_t ep_type)
Configure an EP.
Definition: usb_dcd.c:155
uint32_t DCD_EP_Close(USB_OTG_CORE_HANDLE *pdev, uint8_t ep_addr)
called when an EP is disabled
Definition: usb_dcd.c:194
USB_OTG_EP in_ep[USB_OTG_MAX_TX_FIFOS]
Definition: usb_core.h:262
USB_OTG_STS USB_OTG_EPStartXfer(USB_OTG_CORE_HANDLE *pdev, USB_OTG_EP *ep)
USB_OTG_EPStartXfer : Handle the setup for data xfer for an EP and starts the xfer.
Definition: usb_core.c:1573
uint8_t data_pid_start
Definition: usb_core.h:142
#define USB_OTG_WRITE_REG32(reg, value)
Definition: usb_defines.h:222
uint8_t * xfer_buff
Definition: usb_core.h:147
USB_OTG_STS USB_OTG_EP0StartXfer(USB_OTG_CORE_HANDLE *pdev, USB_OTG_EP *ep)
USB_OTG_EP0StartXfer : Handle the setup for a data xfer for EP0 and starts the xfer.
Definition: usb_core.c:1705
uint32_t xfer_len
Definition: usb_core.h:149
struct _USB_OTG_DCFG_TypeDef::@65 b
uint8_t type
Definition: usb_core.h:141
__IO uint32_t DCTL
Definition: usb_regs.h:116
#define USB_OTG_READ_REG32(reg)
Definition: usb_defines.h:221
struct _USB_OTG_DCTL_TypeDef::@66 b
void USB_OTG_BSP_mDelay(const uint32_t msec)
Definition: usb.c:393
USB_OTG_STS USB_OTG_EPDeactivate(USB_OTG_CORE_HANDLE *pdev, USB_OTG_EP *ep)
USB_OTG_EPDeactivate : Deactivates an EP.
Definition: usb_core.c:1531
void DCD_SetEPStatus(USB_OTG_CORE_HANDLE *pdev, uint8_t epnum, uint32_t Status)
Set the EP Status.
Definition: usb_dcd.c:450
USB_OTG_STS USB_OTG_FlushRxFifo(USB_OTG_CORE_HANDLE *pdev)
USB_OTG_FlushRxFifo : Flush a Rx FIFO.
Definition: usb_core.c:491
USB_OTG_STS USB_OTG_SetCurrentMode(USB_OTG_CORE_HANDLE *pdev, uint8_t mode)
USB_OTG_SetCurrentMode : Set ID line.
Definition: usb_core.c:521
DCD_DEV dev
Definition: usb_core.h:301
#define USB_OTG_EP_BULK
Definition: usb_dcd.h:51
USB_OTG_STS USB_OTG_EPClearStall(USB_OTG_CORE_HANDLE *pdev, USB_OTG_EP *ep)
Clear the EP STALL.
Definition: usb_core.c:1842
uint32_t USB_OTG_GetEPStatus(USB_OTG_CORE_HANDLE *pdev, USB_OTG_EP *ep)
returns the EP Status
Definition: usb_core.c:2038
uint8_t dma_enable
Definition: usb_core.h:167
uint32_t DCD_EP_Stall(USB_OTG_CORE_HANDLE *pdev, uint8_t epnum)
Stall an endpoint.
Definition: usb_dcd.c:296
uint32_t maxpacket
Definition: usb_core.h:145
uint16_t tx_fifo_num
Definition: usb_core.h:144
USB_OTG_EP out_ep[USB_OTG_MAX_TX_FIFOS]
Definition: usb_core.h:263
uint8_t device_status
Definition: usb_core.h:256
uint8_t device_address
Definition: usb_core.h:258
USB_OTG_STS USB_OTG_CoreInitDev(USB_OTG_CORE_HANDLE *pdev)
USB_OTG_CoreInitDev : Initializes the USB_OTG controller registers for device mode.
Definition: usb_core.c:1191
#define DEVICE_MODE
Definition: usb_defines.h:110
void USB_OTG_SetEPStatus(USB_OTG_CORE_HANDLE *pdev, USB_OTG_EP *ep, uint32_t Status)
Set the EP Status.
Definition: usb_core.c:2081
Peripheral Driver Header file.
uint8_t is_stall
Definition: usb_core.h:140
void DCD_EP_SetAddress(USB_OTG_CORE_HANDLE *pdev, uint8_t address)
This Function set USB device address.
Definition: usb_dcd.c:372
uint8_t is_in
Definition: usb_core.h:139
USB_OTG_CORE_REGS regs
Definition: usb_core.h:299
uint32_t DCD_EP_PrepareRx(USB_OTG_CORE_HANDLE *pdev, uint8_t ep_addr, uint8_t *pbuf, uint16_t buf_len)
DCD_EP_PrepareRx.
Definition: usb_dcd.c:221
USB_OTG_STS USB_OTG_CoreInit(USB_OTG_CORE_HANDLE *pdev)
USB_OTG_CoreInit Initializes the USB_OTG controller registers and prepares the core device mode or ho...
Definition: usb_core.c:324
uint32_t xfer_count
Definition: usb_core.h:150
#define USB_OTG_MODIFY_REG32(reg, clear_mask, set_mask)
Definition: usb_defines.h:223
uint32_t DCD_EP_ClrStall(USB_OTG_CORE_HANDLE *pdev, uint8_t epnum)
Clear stall condition on endpoints.
Definition: usb_dcd.c:323
USB_OTG_DREGS * DREGS
Definition: usb_regs.h:225