73 #define REG_TO_SIGNED(_reg) ((int16_t)(_reg)) 74 #define SIGNED_TO_REG(_signed) ((uint16_t)(_signed)) 76 #define REG_TO_FLOAT(_reg) ((float)REG_TO_SIGNED(_reg) / 10000.0f) 77 #define FLOAT_TO_REG(_float) SIGNED_TO_REG((int16_t)((_float) * 10000.0f)) 79 #define PX4IO_PROTOCOL_VERSION 4 82 #define PX4IO_PROTOCOL_MAX_CONTROL_COUNT 8 85 #define PX4IO_PAGE_CONFIG 0 86 #define PX4IO_P_CONFIG_PROTOCOL_VERSION 0 87 #define PX4IO_P_CONFIG_HARDWARE_VERSION 1 88 #define PX4IO_P_CONFIG_BOOTLOADER_VERSION 2 89 #define PX4IO_P_CONFIG_MAX_TRANSFER 3 90 #define PX4IO_P_CONFIG_CONTROL_COUNT 4 91 #define PX4IO_P_CONFIG_ACTUATOR_COUNT 5 92 #define PX4IO_P_CONFIG_RC_INPUT_COUNT 6 93 #define PX4IO_P_CONFIG_ADC_INPUT_COUNT 7 94 #define PX4IO_P_CONFIG_RELAY_COUNT 8 95 #define PX4IO_P_CONFIG_CONTROL_GROUP_COUNT 8 98 #define PX4IO_PAGE_STATUS 1 99 #define PX4IO_P_STATUS_FREEMEM 0 100 #define PX4IO_P_STATUS_CPULOAD 1 102 #define PX4IO_P_STATUS_FLAGS 2 103 #define PX4IO_P_STATUS_FLAGS_OUTPUTS_ARMED (1 << 0) 104 #define PX4IO_P_STATUS_FLAGS_OVERRIDE (1 << 1) 105 #define PX4IO_P_STATUS_FLAGS_RC_OK (1 << 2) 106 #define PX4IO_P_STATUS_FLAGS_RC_PPM (1 << 3) 107 #define PX4IO_P_STATUS_FLAGS_RC_DSM (1 << 4) 108 #define PX4IO_P_STATUS_FLAGS_RC_SBUS (1 << 5) 109 #define PX4IO_P_STATUS_FLAGS_FMU_OK (1 << 6) 110 #define PX4IO_P_STATUS_FLAGS_RAW_PWM (1 << 7) 111 #define PX4IO_P_STATUS_FLAGS_MIXER_OK (1 << 8) 112 #define PX4IO_P_STATUS_FLAGS_ARM_SYNC (1 << 9) 113 #define PX4IO_P_STATUS_FLAGS_INIT_OK (1 << 10) 114 #define PX4IO_P_STATUS_FLAGS_FAILSAFE (1 << 11) 115 #define PX4IO_P_STATUS_FLAGS_SAFETY_OFF (1 << 12) 116 #define PX4IO_P_STATUS_FLAGS_FMU_INITIALIZED (1 << 13) 117 #define PX4IO_P_STATUS_FLAGS_RC_ST24 (1 << 14) 118 #define PX4IO_P_STATUS_FLAGS_RC_SUMD (1 << 15) 120 #define PX4IO_P_STATUS_ALARMS 3 121 #define PX4IO_P_STATUS_ALARMS_VBATT_LOW (1 << 0) 122 #define PX4IO_P_STATUS_ALARMS_TEMPERATURE (1 << 1) 123 #define PX4IO_P_STATUS_ALARMS_SERVO_CURRENT (1 << 2) 124 #define PX4IO_P_STATUS_ALARMS_ACC_CURRENT (1 << 3) 125 #define PX4IO_P_STATUS_ALARMS_FMU_LOST (1 << 4) 126 #define PX4IO_P_STATUS_ALARMS_RC_LOST (1 << 5) 127 #define PX4IO_P_STATUS_ALARMS_PWM_ERROR (1 << 6) 128 #define PX4IO_P_STATUS_ALARMS_VSERVO_FAULT (1 << 7) 130 #define PX4IO_P_STATUS_VBATT 4 131 #define PX4IO_P_STATUS_IBATT 5 132 #define PX4IO_P_STATUS_VSERVO 6 133 #define PX4IO_P_STATUS_VRSSI 7 134 #define PX4IO_P_STATUS_PRSSI 8 137 #define PX4IO_PAGE_ACTUATORS 2 140 #define PX4IO_PAGE_SERVOS 3 143 #define PX4IO_PAGE_RAW_RC_INPUT 4 144 #define PX4IO_P_RAW_RC_COUNT 0 145 #define PX4IO_P_RAW_RC_FLAGS 1 146 #define PX4IO_P_RAW_RC_FLAGS_FRAME_DROP (1 << 0) 147 #define PX4IO_P_RAW_RC_FLAGS_FAILSAFE (1 << 1) 148 #define PX4IO_P_RAW_RC_FLAGS_RC_DSM11 (1 << 2) 149 #define PX4IO_P_RAW_RC_FLAGS_MAPPING_OK (1 << 3) 150 #define PX4IO_P_RAW_RC_FLAGS_RC_OK (1 << 4) 152 #define PX4IO_P_RAW_RC_NRSSI 2 153 #define PX4IO_P_RAW_RC_DATA 3 154 #define PX4IO_P_RAW_FRAME_COUNT 4 155 #define PX4IO_P_RAW_LOST_FRAME_COUNT 5 156 #define PX4IO_P_RAW_RC_BASE 6 159 #define PX4IO_PAGE_RC_INPUT 5 160 #define PX4IO_P_RC_VALID 0 161 #define PX4IO_P_RC_BASE 1 164 #define PX4IO_PAGE_RAW_ADC_INPUT 6 167 #define PX4IO_PAGE_PWM_INFO 7 168 #define PX4IO_RATE_MAP_BASE 0 171 #define PX4IO_PAGE_SETUP 50 172 #define PX4IO_P_SETUP_FEATURES 0 173 #define PX4IO_P_SETUP_FEATURES_SBUS1_OUT (1 << 0) 174 #define PX4IO_P_SETUP_FEATURES_SBUS2_OUT (1 << 1) 175 #define PX4IO_P_SETUP_FEATURES_PWM_RSSI (1 << 2) 176 #define PX4IO_P_SETUP_FEATURES_ADC_RSSI (1 << 3) 178 #define PX4IO_P_SETUP_ARMING 1 179 #define PX4IO_P_SETUP_ARMING_IO_ARM_OK (1 << 0) 180 #define PX4IO_P_SETUP_ARMING_FMU_ARMED (1 << 1) 181 #define PX4IO_P_SETUP_ARMING_MANUAL_OVERRIDE_OK (1 << 2) 182 #define PX4IO_P_SETUP_ARMING_FAILSAFE_CUSTOM (1 << 3) 183 #define PX4IO_P_SETUP_ARMING_INAIR_RESTART_OK (1 << 4) 184 #define PX4IO_P_SETUP_ARMING_ALWAYS_PWM_ENABLE (1 << 5) 185 #define PX4IO_P_SETUP_ARMING_RC_HANDLING_DISABLED (1 << 6) 186 #define PX4IO_P_SETUP_ARMING_LOCKDOWN (1 << 7) 187 #define PX4IO_P_SETUP_ARMING_FORCE_FAILSAFE (1 << 8) 188 #define PX4IO_P_SETUP_ARMING_TERMINATION_FAILSAFE (1 << 9) 189 #define PX4IO_P_SETUP_ARMING_OVERRIDE_IMMEDIATE (1 << 10) 191 #define PX4IO_P_SETUP_PWM_RATES 2 192 #define PX4IO_P_SETUP_PWM_DEFAULTRATE 3 193 #define PX4IO_P_SETUP_PWM_ALTRATE 4 195 #if defined(CONFIG_ARCH_BOARD_PX4IO_V1) || defined(CONFIG_ARCH_BOARD_PX4FMU_V1) 196 #define PX4IO_P_SETUP_RELAYS 5 197 #define PX4IO_P_SETUP_RELAYS_POWER1 (1<<0) 198 #define PX4IO_P_SETUP_RELAYS_POWER2 (1<<1) 199 #define PX4IO_P_SETUP_RELAYS_ACC1 (1<<2) 200 #define PX4IO_P_SETUP_RELAYS_ACC2 (1<<3) 202 #define PX4IO_P_SETUP_RELAYS_PAD 5 205 #define PX4IO_P_SETUP_VBATT_SCALE 6 206 #define PX4IO_P_SETUP_VSERVO_SCALE 6 207 #define PX4IO_P_SETUP_DSM 7 216 #define PX4IO_P_SETUP_SET_DEBUG 9 218 #define PX4IO_P_SETUP_REBOOT_BL 10 219 #define PX4IO_REBOOT_BL_MAGIC 14662 221 #define PX4IO_P_SETUP_CRC 11 223 #define PX4IO_P_SETUP_FORCE_SAFETY_OFF 12 226 #define PX4IO_P_SETUP_RC_THR_FAILSAFE_US 13 228 #define PX4IO_P_SETUP_FORCE_SAFETY_ON 14 229 #define PX4IO_FORCE_SAFETY_MAGIC 22027 232 #define PX4IO_PAGE_CONTROLS 51 233 #define PX4IO_P_CONTROLS_GROUP_0 (PX4IO_PROTOCOL_MAX_CONTROL_COUNT * 0) 234 #define PX4IO_P_CONTROLS_GROUP_1 (PX4IO_PROTOCOL_MAX_CONTROL_COUNT * 1) 235 #define PX4IO_P_CONTROLS_GROUP_2 (PX4IO_PROTOCOL_MAX_CONTROL_COUNT * 2) 236 #define PX4IO_P_CONTROLS_GROUP_3 (PX4IO_PROTOCOL_MAX_CONTROL_COUNT * 3) 238 #define PX4IO_P_CONTROLS_GROUP_VALID 64 239 #define PX4IO_P_CONTROLS_GROUP_VALID_GROUP0 (1 << 0) 240 #define PX4IO_P_CONTROLS_GROUP_VALID_GROUP1 (1 << 1) 241 #define PX4IO_P_CONTROLS_GROUP_VALID_GROUP2 (1 << 2) 242 #define PX4IO_P_CONTROLS_GROUP_VALID_GROUP3 (1 << 3) 245 #define PX4IO_PAGE_MIXERLOAD 52 248 #define PX4IO_PAGE_RC_CONFIG 53 249 #define PX4IO_P_RC_CONFIG_MIN 0 250 #define PX4IO_P_RC_CONFIG_CENTER 1 251 #define PX4IO_P_RC_CONFIG_MAX 2 252 #define PX4IO_P_RC_CONFIG_DEADZONE 3 253 #define PX4IO_P_RC_CONFIG_ASSIGNMENT 4 254 #define PX4IO_P_RC_CONFIG_ASSIGNMENT_MODESWITCH 100 255 #define PX4IO_P_RC_CONFIG_OPTIONS 5 256 #define PX4IO_P_RC_CONFIG_OPTIONS_ENABLED (1 << 0) 257 #define PX4IO_P_RC_CONFIG_OPTIONS_REVERSE (1 << 1) 258 #define PX4IO_P_RC_CONFIG_STRIDE 6 261 #define PX4IO_PAGE_DIRECT_PWM 54 264 #define PX4IO_PAGE_FAILSAFE_PWM 55 267 #define PX4IO_PAGE_SENSORS 56 268 #define PX4IO_P_SENSORS_ALTITUDE 0 271 #define PX4IO_PAGE_TEST 127 272 #define PX4IO_P_TEST_LED 0 275 #define PX4IO_PAGE_CONTROL_MIN_PWM 106 278 #define PX4IO_PAGE_CONTROL_MAX_PWM 107 281 #define PX4IO_PAGE_DISARMED_PWM 108 284 #define PX4IO_PAGE_UART_BUFFER 120 292 #pragma pack(push, 1) 295 #define F2I_MIXER_MAGIC 0x6d74 298 #define F2I_MIXER_ACTION_RESET 0 299 #define F2I_MIXER_ACTION_APPEND 1 309 #define PKT_MAX_REGS 32 // by agreement w/FMU 311 #pragma pack(push, 1) 321 #define PKT_CODE_READ 0x00 322 #define PKT_CODE_WRITE 0x40 323 #define PKT_CODE_SPIUART 0xC0 324 #define PKT_CODE_SUCCESS 0x00 325 #define PKT_CODE_CORRUPT 0x40 326 #define PKT_CODE_ERROR 0x80 328 #define PKT_CODE_MASK 0xc0 329 #define PKT_COUNT_MASK 0x3f 331 #define PKT_COUNT(_p) ((_p).count_code & PKT_COUNT_MASK) 332 #define PKT_CODE(_p) ((_p).count_code & PKT_CODE_MASK) 333 #define PKT_SIZE(_p) ((size_t)((uint8_t *)&((_p).regs[PKT_COUNT(_p)]) - ((uint8_t *)&(_p)))) 337 0x00, 0x07, 0x0E, 0x09, 0x1C, 0x1B, 0x12, 0x15,
338 0x38, 0x3F, 0x36, 0x31, 0x24, 0x23, 0x2A, 0x2D,
339 0x70, 0x77, 0x7E, 0x79, 0x6C, 0x6B, 0x62, 0x65,
340 0x48, 0x4F, 0x46, 0x41, 0x54, 0x53, 0x5A, 0x5D,
341 0xE0, 0xE7, 0xEE, 0xE9, 0xFC, 0xFB, 0xF2, 0xF5,
342 0xD8, 0xDF, 0xD6, 0xD1, 0xC4, 0xC3, 0xCA, 0xCD,
343 0x90, 0x97, 0x9E, 0x99, 0x8C, 0x8B, 0x82, 0x85,
344 0xA8, 0xAF, 0xA6, 0xA1, 0xB4, 0xB3, 0xBA, 0xBD,
345 0xC7, 0xC0, 0xC9, 0xCE, 0xDB, 0xDC, 0xD5, 0xD2,
346 0xFF, 0xF8, 0xF1, 0xF6, 0xE3, 0xE4, 0xED, 0xEA,
347 0xB7, 0xB0, 0xB9, 0xBE, 0xAB, 0xAC, 0xA5, 0xA2,
348 0x8F, 0x88, 0x81, 0x86, 0x93, 0x94, 0x9D, 0x9A,
349 0x27, 0x20, 0x29, 0x2E, 0x3B, 0x3C, 0x35, 0x32,
350 0x1F, 0x18, 0x11, 0x16, 0x03, 0x04, 0x0D, 0x0A,
351 0x57, 0x50, 0x59, 0x5E, 0x4B, 0x4C, 0x45, 0x42,
352 0x6F, 0x68, 0x61, 0x66, 0x73, 0x74, 0x7D, 0x7A,
353 0x89, 0x8E, 0x87, 0x80, 0x95, 0x92, 0x9B, 0x9C,
354 0xB1, 0xB6, 0xBF, 0xB8, 0xAD, 0xAA, 0xA3, 0xA4,
355 0xF9, 0xFE, 0xF7, 0xF0, 0xE5, 0xE2, 0xEB, 0xEC,
356 0xC1, 0xC6, 0xCF, 0xC8, 0xDD, 0xDA, 0xD3, 0xD4,
357 0x69, 0x6E, 0x67, 0x60, 0x75, 0x72, 0x7B, 0x7C,
358 0x51, 0x56, 0x5F, 0x58, 0x4D, 0x4A, 0x43, 0x44,
359 0x19, 0x1E, 0x17, 0x10, 0x05, 0x02, 0x0B, 0x0C,
360 0x21, 0x26, 0x2F, 0x28, 0x3D, 0x3A, 0x33, 0x34,
361 0x4E, 0x49, 0x40, 0x47, 0x52, 0x55, 0x5C, 0x5B,
362 0x76, 0x71, 0x78, 0x7F, 0x6A, 0x6D, 0x64, 0x63,
363 0x3E, 0x39, 0x30, 0x37, 0x22, 0x25, 0x2C, 0x2B,
364 0x06, 0x01, 0x08, 0x0F, 0x1A, 0x1D, 0x14, 0x13,
365 0xAE, 0xA9, 0xA0, 0xA7, 0xB2, 0xB5, 0xBC, 0xBB,
366 0x96, 0x91, 0x98, 0x9F, 0x8A, 0x8D, 0x84, 0x83,
367 0xDE, 0xD9, 0xD0, 0xD7, 0xC2, 0xC5, 0xCC, 0xCB,
368 0xE6, 0xE1, 0xE8, 0xEF, 0xFA, 0xFD, 0xF4, 0xF3
376 uint8_t *p = (uint8_t *)pkt;
380 c = crc8_tab[c ^ *(p++)];
uint16_t regs[PKT_MAX_REGS]
static const uint8_t crc8_tab [256] __attribute__((unused))
static uint8_t crc_packet(struct IOPacket *pkt) __attribute__((unused))