#include <bxcan.h>

Collaboration diagram for PX4::bxcan::CanType:

Public Attributes
volatile uint32_t	MCR

volatile uint32_t	MSR

volatile uint32_t	TSR

volatile uint32_t	RF0R

volatile uint32_t	RF1R

volatile uint32_t	IER

volatile uint32_t	ESR

volatile uint32_t	BTR

uint32_t	RESERVED0 [88]

TxMailboxType	TxMailbox [3]

RxMailboxType	RxMailbox [2]

uint32_t	RESERVED1 [12]

volatile uint32_t	FMR

volatile uint32_t	FM1R

uint32_t	RESERVED2

volatile uint32_t	FS1R

uint32_t	RESERVED3

volatile uint32_t	FFA1R

uint32_t	RESERVED4

volatile uint32_t	FA1R

uint32_t	RESERVED5 [8]

FilterRegisterType	FilterRegister [28]

Detailed Description

Definition at line 63 of file bxcan.h.

Member Data Documentation

◆ BTR

volatile uint32_t PX4::bxcan::CanType::BTR

CAN bit timing register, Address offset: 0x1C

Definition at line 71 of file bxcan.h.

◆ ESR

volatile uint32_t PX4::bxcan::CanType::ESR

CAN error status register, Address offset: 0x18

Definition at line 70 of file bxcan.h.

◆ FA1R

volatile uint32_t PX4::bxcan::CanType::FA1R

CAN filter activation register, Address offset: 0x21C

Definition at line 83 of file bxcan.h.

◆ FFA1R

volatile uint32_t PX4::bxcan::CanType::FFA1R

CAN filter FIFO assignment register, Address offset: 0x214

Definition at line 81 of file bxcan.h.

◆ FilterRegister

FilterRegisterType PX4::bxcan::CanType::FilterRegister[28]

CAN Filter Register, Address offset: 0x240-0x31C

Definition at line 85 of file bxcan.h.

◆ FM1R

volatile uint32_t PX4::bxcan::CanType::FM1R

CAN filter mode register, Address offset: 0x204

Definition at line 77 of file bxcan.h.

◆ FMR

volatile uint32_t PX4::bxcan::CanType::FMR

CAN filter master register, Address offset: 0x200

Definition at line 76 of file bxcan.h.

◆ FS1R

volatile uint32_t PX4::bxcan::CanType::FS1R

CAN filter scale register, Address offset: 0x20C

Definition at line 79 of file bxcan.h.

◆ IER

volatile uint32_t PX4::bxcan::CanType::IER

CAN interrupt enable register, Address offset: 0x14

Definition at line 69 of file bxcan.h.

◆ MCR

volatile uint32_t PX4::bxcan::CanType::MCR

CAN master control register, Address offset: 0x00

Definition at line 64 of file bxcan.h.

◆ MSR

volatile uint32_t PX4::bxcan::CanType::MSR

CAN master status register, Address offset: 0x04

Definition at line 65 of file bxcan.h.

◆ RESERVED0

uint32_t PX4::bxcan::CanType::RESERVED0[88]

Reserved, 0x020 - 0x17F

Definition at line 72 of file bxcan.h.

◆ RESERVED1

uint32_t PX4::bxcan::CanType::RESERVED1[12]

Reserved, 0x1D0 - 0x1FF

Definition at line 75 of file bxcan.h.

◆ RESERVED2

uint32_t PX4::bxcan::CanType::RESERVED2

Reserved, 0x208

Definition at line 78 of file bxcan.h.

◆ RESERVED3

uint32_t PX4::bxcan::CanType::RESERVED3

Reserved, 0x210

Definition at line 80 of file bxcan.h.

◆ RESERVED4

uint32_t PX4::bxcan::CanType::RESERVED4

Reserved, 0x218

Definition at line 82 of file bxcan.h.

◆ RESERVED5

uint32_t PX4::bxcan::CanType::RESERVED5[8]

Reserved, 0x220-0x23F

Definition at line 84 of file bxcan.h.

◆ RF0R

volatile uint32_t PX4::bxcan::CanType::RF0R

CAN receive FIFO 0 register, Address offset: 0x0C

Definition at line 67 of file bxcan.h.

◆ RF1R

volatile uint32_t PX4::bxcan::CanType::RF1R

CAN receive FIFO 1 register, Address offset: 0x10

Definition at line 68 of file bxcan.h.

◆ RxMailbox

RxMailboxType PX4::bxcan::CanType::RxMailbox[2]

CAN FIFO MailBox, Address offset: 0x1B0 - 0x1CC

Definition at line 74 of file bxcan.h.

◆ TSR

volatile uint32_t PX4::bxcan::CanType::TSR

CAN transmit status register, Address offset: 0x08

Definition at line 66 of file bxcan.h.

◆ TxMailbox

TxMailboxType PX4::bxcan::CanType::TxMailbox[3]

CAN Tx MailBox, Address offset: 0x180 - 0x1AC

Definition at line 73 of file bxcan.h.

The documentation for this struct was generated from the following file:

libraries/AP_HAL_PX4/bxcan.h

Public Attributes